Regviz

Silicon Labs /Series1 /EFM32GG11B /EFM32GG11B420F2048GL120 /ACMP2 /INPUTSEL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INPUTSEL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/Series1/EFM32GG11B/EFM32GG11B420F2048GL120/ACMP1/INPUTSEL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0POSSEL0NEGSEL0 (VDD)VASEL0 (VBSEL)VBSEL 0 (VLPSEL)VLPSEL 0 (CSRESEN)CSRESEN 0 (RES0)CSRESSEL

VASEL=VDD, CSRESSEL=RES0

Description

Input Selection Register

Fields

POSSEL

Positive Input Select
NEGSEL

Negative Input Select
VASEL

VA Selection

0 (VDD): ACMPVDD

1 (APORT2YCH0): APORT2Y Channel 0

3 (APORT2YCH2): APORT2Y Channel 2

5 (APORT2YCH4): APORT2Y Channel 4

7 (APORT2YCH6): APORT2Y Channel 6

9 (APORT2YCH8): APORT2Y Channel 8

11 (APORT2YCH10): APORT2Y Channel 10

13 (APORT2YCH12): APORT2Y Channel 12

15 (APORT2YCH14): APORT2Y Channel 14

17 (APORT2YCH16): APORT2Y Channel 16

19 (APORT2YCH18): APORT2Y Channel 18

21 (APORT2YCH20): APORT2Y Channel 20

23 (APORT2YCH22): APORT2Y Channel 22

25 (APORT2YCH24): APORT2Y Channel 24

27 (APORT2YCH26): APORT2Y Channel 26

29 (APORT2YCH28): APORT2Y Channel 28

31 (APORT2YCH30): APORT2Y Channel 30

32 (APORT1XCH0): APORT1X Channel 0

33 (APORT1YCH1): APORT1Y Channel 1

34 (APORT1XCH2): APORT1X Channel 2

35 (APORT1YCH3): APORT1Y Channel 3

36 (APORT1XCH4): APORT1X Channel 4

37 (APORT1YCH5): APORT1Y Channel 5

38 (APORT1XCH6): APORT1X Channel 6

39 (APORT1YCH7): APORT1Y Channel 7

40 (APORT1XCH8): APORT1X Channel 8

41 (APORT1YCH9): APORT1Y Channel 9

42 (APORT1XCH10): APORT1X Channel 10

43 (APORT1YCH11): APORT1Y Channel 11

44 (APORT1XCH12): APORT1X Channel 12

45 (APORT1YCH13): APORT1Y Channel 13

46 (APORT1XCH14): APORT1X Channel 14

47 (APORT1YCH15): APORT1Y Channel 15

48 (APORT1XCH16): APORT1X Channel 16

49 (APORT1YCH17): APORT1Y Channel 17

50 (APORT1XCH18): APORT1X Channel 18

51 (APORT1YCH19): APORT1Y Channel 19

52 (APORT1XCH20): APORT1X Channel 20

53 (APORT1YCH21): APORT1Y Channel 21

54 (APORT1XCH22): APORT1X Channel 22

55 (APORT1YCH23): APORT1Y Channel 23

56 (APORT1XCH24): APORT1X Channel 24

57 (APORT1YCH25): APORT1Y Channel 25

58 (APORT1XCH26): APORT1X Channel 26

59 (APORT1YCH27): APORT1Y Channel 27

60 (APORT1XCH28): APORT1X Channel 28

61 (APORT1YCH29): APORT1Y Channel 29

62 (APORT1XCH30): APORT1X Channel 30

63 (APORT1YCH31): APORT1Y Channel 31
VBSEL

VB Selection
VLPSEL

Low-Power Sampled Voltage Selection
CSRESEN

Capacitive Sense Mode Internal Resistor Enable
CSRESSEL

Capacitive Sense Mode Internal Resistor Select

0 (RES0): Internal capacitive sense resistor value 0

1 (RES1): Internal capacitive sense resistor value 1

2 (RES2): Internal capacitive sense resistor value 2

3 (RES3): Internal capacitive sense resistor value 3

4 (RES4): Internal capacitive sense resistor value 4

5 (RES5): Internal capacitive sense resistor value 5

6 (RES6): Internal capacitive sense resistor value 6

7 (RES7): Internal capacitive sense resistor value 7

Links

()

Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data